\chapter{Assembler}
\label{cha:ASSEMBLER}

This manual describes how an assembler should translate an assembly produced by an \textbf{\texttt{AXE}} compiler into a valid executable (an object file) for a \textbf{\texttt{MACE}} architecture.
If you want to learn more about the \textbf{\texttt{MACE}} internal architecture, see the \textbf{\texttt{MACE}} documentation.
The assembler takes an assembly as input (i.e. symbolic assembler - output of a compilation process) containing both instructions and assembler directives.
Each assembly instruction is directly translated into a specific machine code statement. Every statement is encoded according to the ``binary format rules'' discussed in the \texttt{MACE} documentation.
Assembler directives at first are interpreted and then discarded without producing any machine code instructions.
The output of the translation process is an object file containing both machine code instructions and data information.

The first section describes how does an assembler program works (which translation steps are performed and in which order).
The second section introduces the assembly language and the assembler directives supported by the current implementation of the assembler.
The last section describes the internal structure of an object file and its binary format.

\section{How the Assembler works}
According to the theory, an Assembler is a program that translates an assembly into an object file for a specific architecture.
The binary format of an object file typically depends on both the underlying architecture and the Operative System.
Thus, the structure of an object file may be vary and typically contains a lot of information other than machine code and data information (for example: a symbol table that is used by a \texttt{Linker} for code relocation purpose).

An assembly instruction can be directly mapped in an equivalent machine code instruction. However, an assembly contains also \texttt{assembler directives} and symbols (i.e. labels) that can't be directly translated into machine code.
Usually an assembler directive is used (for example) to notify to the assembler the beginning of a block of data; Labels can be assigned to specific memory locations.
Assembler has the job of translating all the labels in valid memory addresses.

Also, an assembler verifies the correctness of the assembly code given as input (performing a syntactic analysis on the input file and notifying all the encountered errors to the standard error).

As post-condition, only valid assembly files will be translated in ``well formed'' object file.

We can formalize the behavior of an assembler in the following three macro phases:
\begin {itemize}
   \item The assembler initialize its internal data structures.
   \item An assembly given as input is parsed: every instruction/directive is validated.
   \item An object file is written as output using all the information gathered during the parsing process.
\end {itemize}

In the first phase, the assembler initializes various internal data structures for future use/modification (during the parsing process).
Those data structures will be filled with information about data directives and symbolic instructions.
These information will be used then in the last phase in order to produce a valid object file.

The second phase consists in a parsing process where instructions at first are validated (i.e. the consistency of each instruction is checked) and then translated in an intermediate form. Assembler directives are always interpreted and never translated in machine instructions.
Assembler directives typically are used to manipulate the content of the data segment once loaded the object file in memory.

In the last phase all the information gathered during the parsing process are finally used to make an object file that will be written on file and returned as output of the whole program.

\section{Assembly format}
In this section we will introduce the syntax of each supported instruction and data directive.

An instruction specifies an operation type and a list of operands.
Operand types can be:
\begin{itemize}
   \item register identifiers.
   \item immediate values
   \item address values
\end{itemize}

Registers can be directly or indirectly addressed only in ternary instructions.
Also in ternary instructions only the destination register and the second source register can be indirectly addressed.

Supported operand types are:
\begin{itemize}
   \item register identifiers.
   \item immediate values
   \item address values
\end{itemize}

The current section will use the following notation for register identifiers and immediate values
\begin{itemize}
   \item \texttt{Rn} Register `n'.
   \item \texttt{Rdest} Destination Register.
   \item \texttt{Rsource1} First source operand.
   \item \texttt{Rsource2} Second source operand.
   \item \texttt{(Rn)} Indirect register `n'.
   \item \texttt{\#imm} Immediate value. \texttt{imm} is an integer value.
\end{itemize}

Assembler directives use their own semantic and format. Current implementation uses a very little subset of the \texttt{GNU assembler directives}.

\subsection{Ternary Instructions}
Rdest and RSource2 can be directly or indirectly addressed.
Here we will give a brief description of every instruction. A complete description of every instruction can be found in the MACE documentation.


\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ADD}               &\emph{Add binary} \\

   \hline

   Syntax:           &ADD Rdest RSource1 RSource2 \\
   Examples           &Semantics \\
    ADD R2 R1 R3      &R2 $\leftarrow$ R1 + R3 \\
    ADD R2 R1 (R3)    &R2 $\leftarrow$ R1 + [R3] \\
    ADD (R2) R1 (R3)  &[R2] $\leftarrow$ R1 + [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{SUB}           &\emph{Subtract binary} \\
   
   \hline
   
   Syntax:           &SUB Rdest RSource1 RSource2 \\
   Examples            &Semantics \\
    SUB R2 R1 R3      &R2 $\leftarrow$ R1 - R3 \\
    SUB R2 R1 (R3)    &R2 $\leftarrow$ R1 - [R3] \\
    SUB (R2) R1 (R3)  &[R2] $\leftarrow$ R1 - [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ANDL}              &\emph{AND logical} \\
   
   \hline
   
   Syntax:            &ANDL Rdest RSource1 RSource2 \\
   Examples            &Semantics \\
    ANDL R2 R1 R3      &R2 $\leftarrow$ R1 \&\& R3 \\
    ANDL R2 R1 (R3)    &R2 $\leftarrow$ R1 \&\& [R3] \\
    ANDL (R2) R1 (R3)  &[R2] $\leftarrow$ R1 \&\& [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ORL}          &\emph{OR logical} \\
   
   \hline
   
   Syntax:           &ORL Rdest RSource1 RSource2 \\
   Examples           &Semantics \\
    ORL R2 R1 R3      &R2 $\leftarrow$ R1 $\parallel$ R3 \\
    ORL R2 R1 (R3)    &R2 $\leftarrow$ R1 $\parallel$ [R3] \\
    ORL (R2) R1 (R3)  &[R2] $\leftarrow$ R1 $\parallel$ [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{EORL}           &\emph{Exclusive OR logical} \\
   \hline

   Syntax:           &EORL Rdest RSource1 RSource2 \\
      Examples            &Semantics \\
    EORL R2 R1 R3      &R2 $\leftarrow$ R1 $\bigoplus$ R3 \\
    EORL R2 R1 (R3)    &R2 $\leftarrow$ R1 $\bigoplus$ [R3] \\
    EORL (R2) R1 (R3)  &[R2] $\leftarrow$ R1 $\bigoplus$ [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ANDB}              &\emph{AND bit by bit} \\
   
   \hline
   
   Syntax:            &ANDB [Rdest] [RSource1] [RSource2] \\
      Examples            &Semantics \\
    ANDB R2 R1 R3      &R2 $\leftarrow$ R1 \& R3 \\
    ANDB R2 R1 (R3)    &R2 $\leftarrow$ R1 \& [R3] \\
    ANDB (R2) R1 (R3)  &[R2] $\leftarrow$ R1 \& [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ORB}          &\emph{OR bit by bit} \\
   
   \hline
   
   Syntax:           &ORB Rdest RSource1 RSource2 \\
      Examples            &Semantics \\
    ORB R2 R1 R3      &R2 $\leftarrow$ R1 $\mid$ R3 \\
    ORB R2 R1 (R3)    &R2 $\leftarrow$ R1 $\mid$ [R3] \\
    ORB (R2) R1 (R3)  &[R2] $\leftarrow$ R1 $\mid$ [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{EORB}           &\emph{Exclusive OR bit by bit} \\
   \hline

   Syntax:           &EORB Rdest RSource1 RSource2 \\
      Examples            &Semantics \\
    EORB R2 R1 R3      &R2 $\leftarrow$ R1 $\bigoplus$ R3 \\
    EORB R2 R1 (R3)    &R2 $\leftarrow$ R1 $\bigoplus$ [R3] \\
    EORB (R2) R1 (R3)  &[R2] $\leftarrow$ R1 $\bigoplus$ [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{MUL}            &\emph{MUL binary} \\
   \hline

   Syntax:           &MUL Rdest RSource1 RSource2 \\
      Examples            &Semantics \\
    MUL R2 R1 R3      &R2 $\leftarrow$ R1 * R3 \\
    MUL R2 R1 (R3)    &R2 $\leftarrow$ R1 * [R3] \\
    MUL (R2) R1 (R3)  &[R2] $\leftarrow$ R1 * [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{DIV}            &\emph{DIV binary} \\
   \hline

   Syntax:           &DIV Rdest RSource1 RSource2 \\
      Examples            &Semantics \\
    DIV R2 R1 R3      &R2 $\leftarrow$ R1 / R3 \\
    DIV R2 R1 (R3)    &R2 $\leftarrow$ R1 / [R3] \\
    DIV (R2) R1 (R3)  &[R2] $\leftarrow$ R1 / [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{SHR}               &\emph{Binary Shift to Right} \\
   \hline

   Syntax:           &SHR Rdest RSource1 RSource2 \\
      Examples            &Semantics \\
    SHR R2 R1 R3      &R2 $\leftarrow$ R1 $\gg$ R3 \\
    SHR R2 R1 (R3)    &R2 $\leftarrow$ R1 $\gg$ [R3] \\
    SHR (R2) R1 (R3)  &[R2] $\leftarrow$ R1 $\gg$ [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{SHL}            &\emph{Binary Shift to Left} \\
   \hline

   Syntax:           &SHL Rdest RSource1 RSource2 \\
   Examples           &Semantics \\
    SHL R2 R1 R3      &R2 $\leftarrow$ R1 $\ll$ R3 \\
    SHL R2 R1 (R3)    &R2 $\leftarrow$ R1 $\ll$ [R3] \\
    SHL (R2) R1 (R3)  &[R2] $\leftarrow$ R1 $\ll$ [R3] \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ROTL}            &\emph{Rotate binary} \\
   \hline

   Syntax:           &ROTL Rdest RSource1 RSource2 \\
   Semantics:       &Rdest $\leftarrow$ RSource1 RSource2 \\
   Description:     &Actually the \texttt{ROTL} instruction is not supported by the current architecture.
                     \texttt{RSource1} value is rotated to left by \texttt{RSource2} positions. \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ROTR}            &\emph{Rotate binary} \\
   \hline

   Syntax:           &ROTR Rdest RSource1 RSource2 \\
   Semantics:       &Rdest $\leftarrow$ RSource1 RSource2 \\
   Description:     &Actually the \texttt{ROTR} instruction is not supported by the current architecture.
                     \texttt{RSource1} value is rotated to right by \texttt{RSource2} positions. \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{NEG}            &\emph{Negate} \\
   \hline

   Syntax:           &NEG Rdest RSource1 RSource2 \\
      Examples            &Semantics \\
    NEG R2 R1 R3     &R2 $\leftarrow$ - R3 \\
    NEG R2 R1 (R3)   &R2 $\leftarrow$ - [R3] \\
    NEG (R2) R1 (R3) &[R2] $\leftarrow$ - [R3] \\

   Note:             &RSource1 is unused. \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{SPCL}            &\emph{Special opcode} \\
   \hline

   Syntax:           &SPCL Rdest RSource1 RSource2 \\
   Semantics:       &Undefined at the moment. \\
   &\\
   &\\
\end{tabular}

\subsection{Binary Instructions}
\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ADDI}               &\emph{Add with Immediate operand} \\

   \hline
   
   Syntax:           &ADDI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    ADDI R2 R1 \#VAL     &R2 $\leftarrow$ R1 + VAL \\
   &\\
   &\\
\end{tabular}


\begin{tabular}{lp{0.5\textwidth}}
   \textbf{SUBI}           &\emph{Subtract with Immediate operand} \\
   
   \hline
   
   Syntax:           &SUBI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    SUBI R2 R1 \#VAL     &R2 $\leftarrow$ R1 - VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ANDLI}              &\emph{AND with Immediate operand}\\
   
   \hline
   
   Syntax:            &ANDLI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    ANDLI R2 R1 \#VAL     &R2 $\leftarrow$ R1 \&\& VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ORLI}          &\emph{OR with Immediate operand}\\
   
   \hline
   
   Syntax:           &ORLI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    ORLI R2 R1 \#VAL     &R2 $\leftarrow$ R1 $\parallel$ VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{EORLI}           &\emph{Exclusive OR with Immediate operand} \\
   \hline

   Syntax:           &EORLI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    EORLI R2 R1 \#VAL     &R2 $\leftarrow$ R1 $\bigoplus$ VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ANDBI}              &\emph{AND bit by bit with Immediate operand}\\
   
   \hline
   
   Syntax:            &ANDBI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    ANDBI R2 R1 \#VAL     &R2 $\leftarrow$ R1 \& VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ORBI}          &\emph{OR bit by bit with Immediate operand}\\
   
   \hline
   
   Syntax:           &ORBI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    ORBI R2 R1 \#VAL     &R2 $\leftarrow$ R1 $\mid$ VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{EORBI}           &\emph{Exclusive OR bit by bit with immediate operand}\\
   \hline

   Syntax:           &EORBI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    EORBI R2 R1 \#VAL     &R2 $\leftarrow$ R1 $\bigoplus$ VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{MULI}            &\emph{MUL binary with Immediate operand}\\
   \hline

   Syntax:           &MULI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    MULI R2 R1 \#VAL     &R2 $\leftarrow$ R1 * VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{DIVI}            &\emph{DIV binary with Immediate operand}\\
   \hline

   Syntax:           &DIVI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    DIVI R2 R1 \#VAL     &R2 $\leftarrow$ R1 / VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{SHRI}               &\emph{Binary Shift to Right} \\
   \hline

   Syntax:           &SHRI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    SHRI R2 R1 \#VAL     &R2 $\leftarrow$ R1 $\gg$ VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{SHLI}            &\emph{Binary Shift to Left} \\
   \hline

   Syntax:           &SHLI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    SHLI R2 R1 \#VAL     &R2 $\leftarrow$ R1 $\ll$ VAL \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ROTLI}            &\emph{Rotate binary} \\
   \hline

   Syntax:           &ROTLI Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    ROTLI R2 R1 \#VAL     &R2 $\leftarrow$ R1 rotated to left of VAL positions \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{ROTRI}            &\emph{Rotate binary} \\
   \hline

   Syntax:           &ROTRI [Rdest] [RSource1] \#[Immediate] \\
   Example          &Semantics \\
    ROTRI R2 R1 \#VAL     &R2 $\leftarrow$ R1 rotated to right of VAL positions \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{NOTL}            &\emph{Logical complement} \\
   \hline

   Syntax:           &NOT Rdest RSource1 \#Immediate \\
   Example:          &Semantics \\
    NOTL R2 R1 \#VAL     &R2 $\leftarrow$ ! R1\\
   &\\
   Note:             &RSource1 is unused. \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{NOTB}            &\emph{Binary complement} \\
   \hline

   Syntax:           &NOTB Rdest RSource1 \#Immediate \\
   Example          &Semantics \\
    NOTB R2 R1 \#VAL     &R2 $\leftarrow$ $\sim$ R1\\
   &\\
   &\\
\end{tabular}

\subsection{Unary Instructions}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{NOP}            &\emph{No Operation} \\
   \hline

   Syntax:           &NOP \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{MOVA}            &\emph{Move Address to Register Location} \\
   \hline

   Syntax:           &MOVA RDest Address \\
   Example          &Semantics \\
    MOVA R2 L1     &R2 $\leftarrow$ L1 (where L1 is a Label) \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{JSR}            &\emph{Jump To Subroutine} \\
   \hline

   Syntax:           &JSR RDest Address \\
   Note : not implemented yet.
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{RET}            &\emph{Return from Subroutine} \\
   \hline

   Syntax:           &RET \\
   Note : not implemented yet. Actually an HALT instruction is translated instead of a RET. \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{LOAD}            &\emph{Fill a register with a value read from memory} \\
   \hline

   Syntax:           &LOAD RDest Address \\
   Example          &Semantics \\
    LOAD R2 L1     &R2 $\leftarrow$ [L1] (where L1 is a Label) \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{STORE}            &\emph{Spill a value} \\
   \hline

   Syntax:           &STORE RSource Address \\
   Example          &Semantics \\
    STORE R2 L1     &L1 $\leftarrow$ R2 (where L1 is a Label) \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{HALT}            &\emph{Halt the machine processor} \\
   \hline

   Syntax:           &RET \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{Scc}            &\emph{Set according to condition `cc'} \\
   \hline

   Syntax:           &Scc Rdest Address \\
   Semantics (pseudo-code):       &IF cc == 1 THEN Rdest $\leftarrow$ 1;
                     ELSE Rdest $\leftarrow$ 0. \\
   &\\                  
   Note: &\texttt{Address} parameter is unused.
         For more information see the \textbf{\texttt{MACE}} documentation \\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   &\\
   Possible values for `cc':    &\\
   \textbf{EQ}               &set on equal; \\
   \textbf{GE}               &set on greater than or equal; \\
   \textbf{GT}               &set on greater than; \\
   \textbf{LE}               &set on less than or equal; \\
   \textbf{LT}               &set on less than; \\
   \textbf{NE}               &set on not equal; \\
   &\\

   Description:      &The specified condition code `cc' is tested. If the condition is true, `Rdest'
                      is set to one; Otherwise `Rdest' is set to zero. \\
   &\\
   Example:
      SGT R2 0       &set the value of R2 to 1 if the condition GT is verified; 0 otherwise. \\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{READ}            &\emph{Read from standard input an integer value} \\
   \hline

   Syntax:           &READ RSource Address \\
   Example          &Semantics \\
    READ R2 0      &Read from input an 32-bit signed integer value, and store the value to `R2'. \\
   Note:             &\texttt{Address} parameter is unused. \\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{WRITE}            &\emph{Write to standard output an integer value} \\
   \hline

   Syntax:           &WRITE RSource Address \\
   Example          &Semantics \\
    WRITE R2 0        &Write to standard output a 32-bit signed integer value stored into R2. \\
   Note:             &\texttt{Address} parameter is unused. \\
   &\\
   &\\
\end{tabular}

\subsection{Jump Instructions}

\begin{tabular}{lp{0.5\textwidth}}
   \textbf{Bcc}            &\emph{Branch on condition cc} \\
   \hline

   Syntax:           &Bcc Label \\
   Semantics (pseudocode):       &IF cc == 1 THEN \\
                                 & jump to label \texttt{Label}. \\
   &\\
   Note:            &For more information, see the \textbf{\texttt{MACE}} documentation.\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   &\\
   Possible values for `cc':    &\\
   \textbf{EQ}               &Branch on equal; \\
   \textbf{GE}               &Branch on greater than or equal; \\
   \textbf{T}               &Branch always. The branch is always `taken'; \\
   \textbf{F}               &This condition is never verified. Thus, branch like this are never `taken'; \\
   \textbf{HI} :            &Branch on higher than \\
   \textbf{LS}              &Branch on lower than or same; \\
   \textbf{GT}               &Branch on greater than; \\
   \textbf{LE}               &Branch on less than or equal; \\
   \textbf{LT}               &Branch on less than; \\
   \textbf{NE}               &Branch on not equal; \\
   \textbf{CC}              &Branch on carry clear; \\
   \textbf{CS}              &Branch on carry set; \\
   \textbf{VC}              &Branch on overflow clear; \\
   \textbf{VS}              &Branch on overflow set; \\
   \textbf{BPL}             &Branch on plus (i.e. positive);\\
   \textbf{BMI}             &Branch on minus (i.e. negative);\\
\end{tabular}

\begin{tabular}{lp{0.5\textwidth}}
   Description:      &The specified condition code `cc' is tested. If the condition is true,
                      the program counter will be modified in order to point to a specific
                      labeled instruction. \\
   &\\
   Examples:    &\\
   BEQ L1 &Branch to L1 on ``equal to zero''\\
   BT L3 &Always branch to L3\\
   BLT L2 &Branch to L2 on ``less than zero''\\
   &\\
   &\\
\end{tabular}

\subsection{Assembler Directives}
The current implementation provides only a very limited set of assembler directives.
All assembler directives have names that begin with a period (`.') and every directive has its own semantic associated with.

Here is a list of all the supported directives:

\begin{tabular}{lp{0.6\textwidth}}
   &\\
   \textbf{.data}            &\emph{Marks the beginning of a block of data directives} \\
   \hline
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.6\textwidth}}
   \textbf{.text}            &\emph{Marks the beginning of a block of instructions} \\
    \hline
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.6\textwidth}}
   \textbf{.word}            &\emph{Reserve and set a memory word (32-bit) in the data segment} \\
    \hline
   Syntax:           &\texttt{.word} VAL \\
   Semantics:       &Reserve a 32-bit memory location inside the data segment and set the starting
                     value of the location to \texttt{VAL} \\
   Examples: &\\
      \texttt{.word 5} &reserve a word location and set its content with the 32-bit integer value `5'\\
      \texttt{.word 0} &reserve a word location and set its content with the 32-bit integer value `0'\\
   &\\
   &\\
\end{tabular}

\begin{tabular}{lp{0.6\textwidth}}
   \textbf{.space}            &\emph{This directive reserve (without initialize) a given number of bytes into the data segment} \\
    \hline
   Syntax:           &\texttt{.space} VAL \\
   Semantics:       &Reserve \texttt{VAL} (contiguous) bytes inside the data segment. \\
   Examples: &\\
      \texttt{.space 8}     &5 contiguous bytes reserved \\
      \texttt{.space 32}    &32 contiguous bytes reserved \\
\end{tabular}

\section{Object file format}
An object file is returned as result of the assembler process.
It contains both machine code instructions and data information (that will be stored inside the data segment).

In figure~\ref{fig:images:objectformat} is shown the prototype of an object file

\begin{figure}[!hbp]
\centering
\resizebox{5cm}{!}
{\includegraphics{asm/objectfileformat}}
\caption{Object file format}
\label{fig:images:objectformat}
\end{figure}

An object file is composed by an header of 20 bytes followed by the content of the instruction segment and the content of the data segment.
The first 4 bytes must always contain the ASCII binary representation for the `L' `F' `C' `M' characters.
The following 16 bytes are actually unused: they are reserved for future uses.
